1. Field of the Invention
The present invention relates to semiconductor fabrication techniques, including techniques for forming wiring layers, and to a corresponding semiconductor device.
2. Description of the Related Art
Lithographic techniques are used to fabricate patterns in semiconductor materials. Due to the demand for ever-smaller dimensions in semiconductor devices such as integrated circuits, techniques such as the spacer process have been developed. In this process, a spacer material is deposited as a film layer on a pattern of raised features, e.g., lines, which is formed on an underlying layer. Etching removes portions of the film which are on horizontal surfaces of the underlying layer, leaving only portions of the film on sidewalls of the raised features. Subsequently, the raised features are removed, leaving only the spacers in a new pattern of raised features which has twice the line density as the previous pattern. This process can performed once, as a single spacer or patterning process, or multiple times, in a multiple spacer or patterning process. However, closed loop shapes can be formed in the spacer patterns which are not desired.